1. Field of the Invention
The present invention relates to a solid-state image pickup apparatus used in a video camera, a digital still camera, or the like.
2. Description of the Related Art
CMOS sensors expected to achieve high image quality and high resolution are widely used in digital cameras and digital video cameras. With the increase in the number of pixels in solid-state image pickup apparatuses, the miniaturization of each pixel progresses and performance for such a solid-state image pickup apparatus is increased. The increase in a signal reading speed and the increase in a signal-to-noise (S/N) ratio are applied to achieve high definition. Japanese Patent Laid-Open No. 2005-086260 discloses a technique for achieving a high signal reading speed and a high S/N ratio.
When a pixel pitch is reduced, fixed pattern noise may not be sufficiently suppressed with the technique disclosed in Japanese Patent Laid-Open No. 2005-086260.
In a solid-state image pickup apparatus disclosed in Japanese Patent Laid-Open No. 2005-086260, a line memory that is a reading circuit includes blocks. A lead line for connecting a block line and a common signal line is sandwiched between a control line and an inversion control line for a switch used for transferring a signal from the block line to the common line. Since the electric deflection of the lead line caused by a pulse signal passing through the control line can be prevented with an inverted signal passing through the inversion control line, the occurrence of fixed pattern noise can be suppressed.
However, as the reduction in a pixel pitch progresses in solid-state image pickup apparatuses, the arrangement pitch of a reading circuit is reduced. It is therefore difficult to obtain space for the above-described two switch control lines. The technique disclosed in Japanese Patent Laid-Open No. 2005-086260 is not suitable for the reduction in a pixel pitch.